1. Technical Field
The present invention relates to a power supply circuit for electronic devices, and more particularly, to a power supply circuit that supplies power to load circuitry operating at a supply voltage of 1 volt or below.
2. Discussion of the Background
With the growing concern for environmental protection and energy conservation, there is increasing demand for electrical appliances operating at low power. Thus, power supply circuits, particularly those used in battery-powered devices, are required to be more energy-efficient to meet low-power and low-voltage requirements of such low-power electronic devices.
FIG. 1 is a diagram illustrating an example of a conventional power supply circuit 100 used in a low-power electronic device.
As shown in FIG. 1, the power supply circuit 201 includes a first voltage regulator 210 and a second voltage regulator 220, and has an input terminal Vdd and a ground terminal Vss connected to positive and negative terminals of a battery Bat and an output terminal OUT connected to a load circuit, not shown.
In the power supply circuit 201, the first voltage regulator 210 is a step-down switching regulator and the second voltage regulator 220 is a series regulator. The second voltage regulator 220 includes a P-channel metal-oxide-semiconductor (PMOS) transistor or output transistor M201, first and second resistors R201 and R202, an error amplifier 221, and a reference voltage generator 222.
During operation, the power supply circuit 201 regulates a battery voltage Vbat input from the battery Bat to generate a constant supply voltage for output to the load circuit, wherein the first voltage regulator 210 steps the battery voltage down to a given first level, followed by the second voltage regulator 220 linearly regulating the stepped-down voltage to a given second level.
Unlike other common power supplies using a combination of first and second voltage regulators, the power supply circuit 201 draws power to drive the reference voltage generator 222 directly from the battery Bat and not from the first voltage regulator 210. This eliminates the need for setting the output voltage of the first voltage regulator significantly higher than that of the second voltage regulator, which is typical of most conventional dual-regulator designs where the reference voltage generator consumes relatively high power. Thus, the power supply circuit 201 features enhanced efficiency in terms of power consumption in the secondary voltage regulation.
However, the power supply circuit described above may not be used with modern low-power electronic devices operating at extremely low voltages of 1 volt or below, where a PMOS-based output transistor, with an applied gate voltage not falling below 0 volt, may not properly turn on to output sufficient current to the load circuit.
One approach to improving performance of the conventional circuit is to lower the on-resistance of the PMOS transistor, for example, by increasing the aspect ratio or reducing the threshold voltage. However, such an approach could be costly or inefficient, since increasing the aspect ratio of a PMOS transistor requires increased chip area and additional manufacturing costs, and reducing the threshold voltage of a transistor gate induces significant current leak during shutoff, resulting in increased energy consumption.
Another approach to overcoming the limitation of the PMOS-based conventional circuit is to use an N-channel MOS (NMOS) transistor as the output device in the second voltage regulator. Using an NMOS device provides proper turn-on of the output transistor, leading to improved performance of the power supply circuit. However, even such an approach is insufficient as it can compromise stability of the power supply due to overshoot of the output voltage during start-up.
Thus, what is needed is an energy-efficient, stable power supply circuit that can supply power to low-power electronic devices that operate at extremely low voltages of 1 volt or below.